@inproceedings{81d8d4c977dd4cd3b24f9f351ac7419e,
title = "FPGA-Based Fault-Tolerant Speed PI Control for a Three-Phase Brushless DC Motor",
abstract = "Electronic devices exposed to non-ionizing radiation are susceptible to Single-Event Upsets (SEUs) in digital systems. These SEUs can lead to failures in the digital system of Brushless DC (BLDC) motor drivers, resulting in data reading errors, speed control malfunctions, phase commutation inaccuracies, and erroneous rotor position detection, which can have significant consequences in critical situations. Thus, this paper proposes to enhance the reliability of a Proportional-Integral (PI) speed control system for BLDC motors by employing the Triple Modular Redundancy (TMR) technique implemented within an FPG Artix-7. The results of the control efficiency are evaluated through its performance characteristics given through simulation and implementation. The fault tolerance validation of this proposal was carried out through fault injection campaigns. The results demonstrate that the TMR-based system can tolerate around 115\% more faults than a non-TMR system, highlighting the robustness and reliability of the proposed solution.",
keywords = "BLDC motors, Fault injection, Fault-Tolerance, PI control, SEU, SRAM-based FPGA, TMR",
author = "A. Ancassi and J. Minaya and J. Tarrillo",
note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 16th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2025 ; Conference date: 25-02-2025 Through 28-02-2025",
year = "2025",
doi = "10.1109/LASCAS64004.2025.10966356",
language = "English",
series = "2025 IEEE 16th Latin American Symposium on Circuits and Systems, LASCAS 2025 - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2025 IEEE 16th Latin American Symposium on Circuits and Systems, LASCAS 2025 - Proceedings",
}