Architecting a computer with a full optical RAM

Jorge Gonzalez, Lois Orosa, Rodolfo Azevedo

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

4 Citas (Scopus)

Resumen

On-chip photonics has gained attention in research for high-speed processor communication networks, and recent developments in optical fabrication techniques and data buffering has offered new opportunities for processor systems. In this work, we evaluate a processor with a full optical main memory system. We design it using recent optical devices that leverages the high-bandwidth optical capabilities to obtain low memory access latency, similar to those in state of the art L2 caches. This characteristic enables the possibility of eliminating the second level of caches, saving processor area. Experimental results show the average speedup is ×1.34 with SPEC2006 and ×1.80 with irregular applications.

Idioma originalInglés
Título de la publicación alojada2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016
EditorialInstitute of Electrical and Electronics Engineers Inc.
Páginas716-719
Número de páginas4
ISBN (versión digital)9781509061136
DOI
EstadoPublicada - 2016
Publicado de forma externa
Evento23rd IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016 - Monte Carlo, Mónaco
Duración: 11 dic. 201614 dic. 2016

Serie de la publicación

Nombre2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016

Conferencia

Conferencia23rd IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016
País/TerritorioMónaco
CiudadMonte Carlo
Período11/12/1614/12/16

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