Soft Error Mitigation in a Real-Time Control System Through Hardware Protection on an SRAM-Based FPGA

A. Giuffra; J. Minaya; J. Tarrillo

doi:10.1109/LATS70329.2026.11480358

Soft Error Mitigation in a Real-Time Control System Through Hardware Protection on an SRAM-Based FPGA

A. Giuffra
, J. Minaya
, J. Tarrillo

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Robotics and automation systems requires a design to handle transient faults that can lead to financial loss, physical damage, or equipment failure. Non-ionizing radiation is a common source of such faults in transistor-based devices. SRAMbased FPGAs provide flexibility for embedded designs using soft processors. This work presents a real-time temperature control system implemented on a MicroBlaze soft-core processor within a Xilinx Artix-7 XC7A100T FPGA, deployed on the Nexys A7100T board. Robustness against Single Event Upsets (SEUs) is evaluated through fault injection on three PI controller implementations: software-based, hardware IP core, and a triplicated TMR design. FreeRTOS manages scheduling, data acquisition, and control signal generation. MATLAB simulations serve as a baseline to validate and compare performance and reliability across the three approaches.

Original language	English
Title of host publication	2026 IEEE 27th Latin American Test Symposium, LATS 2026
Publisher	Institute of Electrical and Electronics Engineers Inc.
Edition	2026
ISBN (Electronic)	9798319542359
DOIs	https://doi.org/10.1109/LATS70329.2026.11480358
State	Published - 2026
Event	27th Latin American Test Symposium, LATS 2026 - Florianopolis, Brazil Duration: 17 Mar 2026 → 20 Mar 2026

Conference

Conference	27th Latin American Test Symposium, LATS 2026
Country/Territory	Brazil
City	Florianopolis
Period	17/03/26 → 20/03/26

Keywords

Fault injection
SRAM-FPGA
Soft error mitigation
Soft processor
real-time operating system

Access to Document

10.1109/LATS70329.2026.11480358

Cite this

@inproceedings{7827311fe0ca448a8c8cdc3501ae366d,

title = "Soft Error Mitigation in a Real-Time Control System Through Hardware Protection on an SRAM-Based FPGA",

abstract = "Robotics and automation systems requires a design to handle transient faults that can lead to financial loss, physical damage, or equipment failure. Non-ionizing radiation is a common source of such faults in transistor-based devices. SRAMbased FPGAs provide flexibility for embedded designs using soft processors. This work presents a real-time temperature control system implemented on a MicroBlaze soft-core processor within a Xilinx Artix-7 XC7A100T FPGA, deployed on the Nexys A7100T board. Robustness against Single Event Upsets (SEUs) is evaluated through fault injection on three PI controller implementations: software-based, hardware IP core, and a triplicated TMR design. FreeRTOS manages scheduling, data acquisition, and control signal generation. MATLAB simulations serve as a baseline to validate and compare performance and reliability across the three approaches.",

keywords = "Fault injection, SRAM-FPGA, Soft error mitigation, Soft processor, real-time operating system",

author = "A. Giuffra and J. Minaya and J. Tarrillo",

note = "Publisher Copyright: {\textcopyright} 2026 IEEE.; 27th Latin American Test Symposium, LATS 2026 ; Conference date: 17-03-2026 Through 20-03-2026",

year = "2026",

doi = "10.1109/LATS70329.2026.11480358",

language = "English",

booktitle = "2026 IEEE 27th Latin American Test Symposium, LATS 2026",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

edition = "2026",

}

Giuffra, A, Minaya, J & Tarrillo, J 2026, Soft Error Mitigation in a Real-Time Control System Through Hardware Protection on an SRAM-Based FPGA. in 2026 IEEE 27th Latin American Test Symposium, LATS 2026. 2026 edn, Institute of Electrical and Electronics Engineers Inc., 27th Latin American Test Symposium, LATS 2026, Florianopolis, Brazil, 17/03/26. https://doi.org/10.1109/LATS70329.2026.11480358

Soft Error Mitigation in a Real-Time Control System Through Hardware Protection on an SRAM-Based FPGA. / Giuffra, A.; Minaya, J.; Tarrillo, J.
2026 IEEE 27th Latin American Test Symposium, LATS 2026. 2026. ed. Institute of Electrical and Electronics Engineers Inc., 2026.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Soft Error Mitigation in a Real-Time Control System Through Hardware Protection on an SRAM-Based FPGA

AU - Giuffra, A.

AU - Minaya, J.

AU - Tarrillo, J.

PY - 2026

Y1 - 2026

N2 - Robotics and automation systems requires a design to handle transient faults that can lead to financial loss, physical damage, or equipment failure. Non-ionizing radiation is a common source of such faults in transistor-based devices. SRAMbased FPGAs provide flexibility for embedded designs using soft processors. This work presents a real-time temperature control system implemented on a MicroBlaze soft-core processor within a Xilinx Artix-7 XC7A100T FPGA, deployed on the Nexys A7100T board. Robustness against Single Event Upsets (SEUs) is evaluated through fault injection on three PI controller implementations: software-based, hardware IP core, and a triplicated TMR design. FreeRTOS manages scheduling, data acquisition, and control signal generation. MATLAB simulations serve as a baseline to validate and compare performance and reliability across the three approaches.

AB - Robotics and automation systems requires a design to handle transient faults that can lead to financial loss, physical damage, or equipment failure. Non-ionizing radiation is a common source of such faults in transistor-based devices. SRAMbased FPGAs provide flexibility for embedded designs using soft processors. This work presents a real-time temperature control system implemented on a MicroBlaze soft-core processor within a Xilinx Artix-7 XC7A100T FPGA, deployed on the Nexys A7100T board. Robustness against Single Event Upsets (SEUs) is evaluated through fault injection on three PI controller implementations: software-based, hardware IP core, and a triplicated TMR design. FreeRTOS manages scheduling, data acquisition, and control signal generation. MATLAB simulations serve as a baseline to validate and compare performance and reliability across the three approaches.

KW - Fault injection

KW - SRAM-FPGA

KW - Soft error mitigation

KW - Soft processor

KW - real-time operating system

UR - https://www.scopus.com/pages/publications/105038338338

U2 - 10.1109/LATS70329.2026.11480358

DO - 10.1109/LATS70329.2026.11480358

M3 - Conference contribution

AN - SCOPUS:105038338338

BT - 2026 IEEE 27th Latin American Test Symposium, LATS 2026

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 27th Latin American Test Symposium, LATS 2026

Y2 - 17 March 2026 through 20 March 2026

ER -

Soft Error Mitigation in a Real-Time Control System Through Hardware Protection on an SRAM-Based FPGA

Abstract

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this