@inproceedings{8857e53ecfa547fea5b85e627d552511,
title = "FPGA-Based file level AES-encryption system with volatile physical key",
abstract = "Traditional file encryption methods face security limitations due to vulnerabilities to side-channel attacks in both software and hardware implementations. In addition, most commercial solutions are designed for storage-level encryption and are typically embedded in storage devices. This paper presents a Field-Programmable Gate Array (FPGA)-based hardware encryption system that provides improved resistance to side-channel attacks. The system performs file-level encryption (FLE) using the Advanced Encryption Standard (AES) with a 256-bit key. The encryption key is entered through a physical keypad and stored only in a volatile BRAM block, ensuring that it is erased at power-off and cannot be extracted remotely. A USB-UART interface is integrated into the system, enabling connection to any conventional computer. Experimental results showed that the device and its interface operated as expected, ensured that the encryption key remained volatile, and successfully encrypted and decrypted files, which could only be restored with the corresponding key.",
keywords = "FPGA, UART, USB, encryption, file, hardware",
author = "Diego Penaflor and Jimmy Tarrillo",
note = "Publisher Copyright: {\textcopyright}2026 IEEE.; 17th Latin American Symposium on Circuits and Systems, LASCAS 2026 ; Conference date: 24-02-2026 Through 27-02-2026",
year = "2026",
doi = "10.1109/LASCAS67804.2026.11457160",
language = "English",
series = "2026 IEEE 17th Latin American Symposium on Circuits and Systems, LASCAS 2026 - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2026 IEEE 17th Latin American Symposium on Circuits and Systems, LASCAS 2026 - Proceedings",
}