Design Exploration of DWT-Based Feature Extraction Using FPGA for High-Performance Signal Processing

The discrete wavelet transform (DWT) is commonly used for feature extraction in machine learning applications. Since these applications are frequently deployed in portable systems with limited computational resources, FPGA-based hybrid hardware/software solutions might be a viable choice. This article provides an analysis of various 4-level db4 DWT and feature extraction techniques implemented on the Zynq 7020 device. Alternative DWT versions include fixed-point and floating-point implementations, cascade and single-core reuse architectures, as well as designs in HDL and VHDL. The feature extraction process considers mean, energy, and entropy. It has also been implemented in an architecture that efficiently reuses these computational cores. These versions are compared in terms of accuracy, resources used, performance, and power consumption.