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Architecting a computer with a full optical RAM

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

On-chip photonics has gained attention in research for high-speed processor communication networks, and recent developments in optical fabrication techniques and data buffering has offered new opportunities for processor systems. In this work, we evaluate a processor with a full optical main memory system. We design it using recent optical devices that leverages the high-bandwidth optical capabilities to obtain low memory access latency, similar to those in state of the art L2 caches. This characteristic enables the possibility of eliminating the second level of caches, saving processor area. Experimental results show the average speedup is ×1.34 with SPEC2006 and ×1.80 with irregular applications.

Original languageEnglish
Title of host publication2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages716-719
Number of pages4
ISBN (Electronic)9781509061136
DOIs
StatePublished - 2016
Externally publishedYes
Event23rd IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016 - Monte Carlo, Monaco
Duration: 11 Dec 201614 Dec 2016

Publication series

Name2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016

Conference

Conference23rd IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016
Country/TerritoryMonaco
CityMonte Carlo
Period11/12/1614/12/16

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